[PATCH] mtd: spi-nor: spansion: Add support for s25hl-t/s25hs-t

Takahiro Kuwano tkuw584924 at gmail.com
Thu Aug 6 02:21:48 EDT 2020

Hi Pratyush,

On 8/5/2020 3:44 AM, Pratyush Yadav wrote:
>> +	 * S25HL/HS-T (Semper Flash with Quad SPI) Family
>> +	 *
>> +	 *   For the faster clock speed than 133MHz (max 166MHz), the Flash
>> +	 *   requires 2 dummy cycles before data output in RDID(9fh) and
>> +	 *   RDSR(05h) operations. As complex fixups are needed to handle that,
>> +	 *   this driver supports up to 133MHz clock speed at this point.
>> +	 *
>> +	 *   The Read SFDP operation is supported up to 50MHz. Since most of the
>> +	 *   modern QSPI controllers are assumed to run at faster clock speed
>> +	 *   than 50MHz, SFDP parsing is skiped then equivalent setup and some
>> +	 *   optimization are done by spi_nor_fixups hooks.
> Are those modern controllers capable of running at lower speeds if told 
> to do so? For example, if during SFDP reads we tell the controller to 
> run at a maximum of 50MHz, will most controllers be able to do that?
> If yes, I think we should tell controllers the speed they should run at 
> otherwise we just ignore the entire SFDP table for all the modern 
> controllers and platforms, shifting all the burden to the software. That 
> defeats the purpose of having SFDP.
> I was recently experimenting with this, and managed to make the Cadence 
> QSPI controller run at lower speeds for SFDP commands, but I'm not sure 
> if other controllers will be able to do that.

I just thought about the controllers which can run at fixed speed, but as you
pointed, most controllers are able to change the speed per command.
I will remove the SPI_NOR_SKIP_SFDP flag.

> I took a quick look through the patch. Most of it looks good to me, but 
> I am not convinced that simply skipping SFDP is a good idea.

Thanks a lot for your feedback! I will revise the patch addressing all your

Best Regards,
Takahiro Kuwano

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