[PATCH v10 2/2] mtd: spi-nor: Set default Quad Enable method for ISSI flashes

Tudor.Ambarus at microchip.com Tudor.Ambarus at microchip.com
Mon Nov 11 11:38:48 PST 2019



On 10/22/2019 08:22 PM, Tudor.Ambarus at microchip.com wrote:
> From: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> 
> Set the default Quad Enable method for ISSI flashes. Used for
> ISSI flashes (IS25WP256D-JMLE) that do not support SFDP tables
> and can not determine the Quad Enable method by parsing BFPT.
> 
> Based on code originally written by Wesley Terpstra <wesley at sifive.com>
> and/or Palmer Dabbelt <palmer at sifive.com>
> https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> [tudor.ambarus at microchip.com:
> - rebase, split and adapt for v5.4-rc4,
> - use PMC CFI ID for ISSI. According to JEP106BA, "Programmable Micro Corp"
>   changed its name to Integrated Silicon Solution (ISSI)]
> Signed-off-by: Tudor Ambarus <tudor.ambarus at microchip.com>
> Reviewed-by: Vignesh Raghavendra <vigneshr at ti.com>
> ---
> Sagar, this is needed just for the ISSI flashes that can't retrieve the
> Quad Enable method from BFPT. It deserves a separate patch. Let me know
> if you are ok with how I reorganized the patches.
> 
>  drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++
>  include/linux/mtd/spi-nor.h   | 1 +
>  2 files changed, 10 insertions(+)

Synced with latest spi-nor/next, s/macronix_quad_enable/
spi_nor_sr1_bit6_quad_enable and applied to spi-nor/next.


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