[PATCH v10 1/2] mtd: spi-nor: Add support for is25wp256

Vignesh Raghavendra vigneshr at ti.com
Thu Nov 7 01:03:14 PST 2019



On 22/10/19 10:52 PM, Tudor.Ambarus at microchip.com wrote:
> From: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> 
> Update the spi_nor_id table for is25wp256 (32MB) device from ISSI,
> present on HiFive Unleashed dev board (Rev: A00).
> 
> Use the post bfpt fixup hook for the is25wp256 device, as done for
> the is25lp256 device to overwrite the wrong address width advertised
> by BFPT.
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> [tudor.ambarus at microchip.com: rebase, split and adapt for v5.4-rc4]
> Signed-off-by: Tudor Ambarus <tudor.ambarus at microchip.com>

Reviewed-by: Vignesh Raghavendra <vigneshr at ti.com>

> ---
> Sagar, I set the fixups hook in this patch, to avoid adding support for a flash that doesn't work from day one.
> 
>  drivers/mtd/spi-nor/spi-nor.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 7acf4a93b592..3fc1eb20dca5 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -2267,6 +2267,10 @@ static const struct flash_info spi_nor_ids[] = {
>  			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>  	{ "is25wp128",  INFO(0x9d7018, 0, 64 * 1024, 256,
>  			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> +	{ "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512,
> +			    SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +			    SPI_NOR_4B_OPCODES)
> +		       .fixups = &is25lp256_fixups },
>  
>  	/* Macronix */
>  	{ "mx25l512e",   INFO(0xc22010, 0, 64 * 1024,   1, SECT_4K) },
> 

-- 
Regards
Vignesh



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