[PATCH v2 01/15] mtd: nand: Add max_bad_eraseblocks_per_lun info to memorg

Schrempf Frieder frieder.schrempf at kontron.de
Thu Jun 6 01:57:32 PDT 2019


On 06.06.19 10:52, Frieder Schrempf wrote:
> On 06.06.19 10:39, Boris Brezillon wrote:
>> On Thu, 6 Jun 2019 08:27:11 +0000
>> Schrempf Frieder <frieder.schrempf at kontron.de> wrote:
>>
>>> Hi Emil,
>>>
>>> On 04.06.19 10:01, Emil Lenngren wrote:
>>>> Hi Miquel,
>>>>>    static const struct spinand_info macronix_spinand_table[] = {
>>>>>           SPINAND_INFO("MX35LF1GE4AB", 0x12,
>>>>> -                    NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
>>>>> +                    NAND_MEMORG(1, 2048, 64, 64, 1024, 40, 1, 1, 1),
>>>>>                        NAND_ECCREQ(4, 512),
>>>>>                        SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
>>>>>                                                 &write_cache_variants,
>>>>> @@ -103,7 +103,7 @@ static const struct spinand_info 
>>>>> macronix_spinand_table[] = {
>>>>>                        SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
>>>>>                                        mx35lf1ge4ab_ecc_get_status)),
>>>>>           SPINAND_INFO("MX35LF2GE4AB", 0x22,
>>>>> -                    NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
>>>>> +                    NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 2, 1, 1),
>>>>>                        NAND_ECCREQ(4, 512),
>>>>
>>>> Maybe a bit late to the discussion, but shouldn't 20 and 40 be swapped
>>>> here, i.e. isn't it the larger flash that has more max bad blocks than
>>>> the smaller one?
>>>
>>> I think Miquel is out of office for some days, so I just checked and you
>>> are right, the maximum number of bad blocks should be swapped.
>>>
>>> Actually there is also a wrong value in the GigaDevice driver: For the
>>> GD5F4GQ4xA it should be 80 instead of 40.
>>
>> Haven't checked the datasheet, but keep in mind that this is the max
>> number of eraseblock per LUN.
> 
> The datasheet gives 20 for the 1G type and 40 for the 2G type. Both 
> types have only one LUN. Only the 2G type has 2 planes, but that 
> shouldn't make a difference, right?

Sorry, I was referring to the Macronix chips. You were probably talking 
about the GigaDevice. But they all have only one LUN, too. So I think I 
got it right.


More information about the linux-mtd mailing list