spi-nand: GigaDevices Support; qca9560-spi Device-ID Byte-Shift Inconsistency
gch981213 at gmail.com
Wed Apr 24 07:48:10 PDT 2019
On Wed, Apr 24, 2019 at 12:33 AM Jeff Kletsky <lede at allycomm.com> wrote:
> is that the results of the Read ID does not seem to need the byte
> shift in `gigadevice.c`
It's needed for currently supported chips. According to datasheet you
posted, GD changed the implementation of the READ ID command for the
GD5FxGQ4xF variant and you need to patch the detect function to check
the first byte and match against a different spinand_info array.
> The second question relates to enabling the use of the GD5FxGQ4FxxG
> series. It appears that I will need to implement
> and the like. Though I've read through both the F-series data sheet
> as well as the E-series data sheet, it's not clear to me where the
> ooblayout comes from.
> Is this an implementation decision for Linux, or is there a section of
> the two datasheets that could assist me in proper implementation of
> the layout for the GD5F1GQ4UFxxG series?
Page 35 of link  you posted has the OOB layout info available.
My understanding is that ooblayout_free returns free areas inside OOB
area and ooblayout_ecc returns area for ECC data.
According to datasheet the free areas are 0-0x7ff and 0x810-0x83f.
0x840-0x87f is the ECC area.
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