[PATCH] mtd: rawnand: fsmc: Make sure we wait tWB before polling the STATUS reg
Miquel Raynal
miquel.raynal at bootlin.com
Fri May 4 02:45:10 PDT 2018
Hi Boris,
On Thu, 3 May 2018 09:45:44 +0200, Boris Brezillon
<boris.brezillon at bootlin.com> wrote:
> NAND chips require a bit of time to take the NAND operation into account
> and set the BUSY bit in the STATUS reg. Make sure we don't poll the
> STATUS reg too early.
>
> Fixes: 4da712e70294 ("mtd: nand: fsmc: use ->exec_op()")
> Signed-off-by: Boris Brezillon <boris.brezillon at bootlin.com>
> ---
> drivers/mtd/nand/raw/fsmc_nand.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
> index 28c48dcc514e..0960665858b7 100644
> --- a/drivers/mtd/nand/raw/fsmc_nand.c
> +++ b/drivers/mtd/nand/raw/fsmc_nand.c
> @@ -18,6 +18,7 @@
>
> #include <linux/clk.h>
> #include <linux/completion.h>
> +#include <linux/delay.h>
> #include <linux/dmaengine.h>
> #include <linux/dma-direction.h>
> #include <linux/dma-mapping.h>
> @@ -695,6 +696,13 @@ static int fsmc_exec_op(struct nand_chip *chip, const struct nand_operation *op,
> pr_debug(" ->WAITRDY [max %d ms]\n",
> instr->ctx.waitrdy.timeout_ms);
>
> + /*
> + * Make sure we wait tWB before polling the STATUS
> + * register.
> + */
> + if (op_id && op->instrs[op_id - 1].delay_ns)
> + ndelay(op->instrs[op_id - 1].delay_ns);
> +
> ret = nand_soft_waitrdy(chip,
> instr->ctx.waitrdy.timeout_ms);
> break;
I'm afraid that we encounter this exact same issue with all the drivers
using nand_soft_waitrdy() whenever the controller does not already
wait for tWB. Could we force a tWB_max delay directly inside
nand_soft_waitrdy()?
Thanks,
Miquèl
--
Miquel Raynal, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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