[PATCH 0/3] mtd: fix AMD/Intel flash bugs

[Andrea Adami]

On Sun, Mar 11, 2018 at 5:06 PM, Joakim Tjernlund
<Joakim.Tjernlund at infinera.com> wrote:
> On Thu, 2018-03-01 at 14:39 +0100, Joakim Tjernlund wrote:
>> This fixes a bug which allows read/write to a erase block currently
>> erasing.
>> Also works around a chip bug in Micron 28F00AP30 chips.
>>
>> Joakim Tjernlund (3):
>>   cfi_cmdset_0001: Do not allow read/write to suspend erase block.
>>   cfi_cmdset_0001: Workaround Micron Erase suspend bug.
>>   cfi_cmdset_0002: Do not allow read/write to suspend erase block.
>>
>>  drivers/mtd/chips/cfi_cmdset_0001.c | 33 ++++++++++++++++++++++++++++-----
>>  drivers/mtd/chips/cfi_cmdset_0002.c |  9 ++++++---
>>  include/linux/mtd/flashchip.h       |  1 +
>>  3 files changed, 35 insertions(+), 8 deletions(-)
>>
>
> Ping?
> This is a fairly serious bug as it confuses the flash state machine,
> making further flash access fail.
>

Hello,

I don't undertsand exactly from the titles what is happening.
Do you want to disable erase and wite suspend like in this other 2016
patch found around?

https://patchwork.kernel.org/patch/9380029/

See, I am user of the Sharp LH28F640BF NOR, very similar to the Intel
Startaflash, 4-Plane Page Mode Dual Work.
On these chips erase suspend works just fine.
What has been disabled is dual work: simultaneous read-while-erase and
read-while-program because there has never been real support for
n-planes in kernel.

What is exactly the issue?
Regards
Andrea

>  Jocke
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