[PATCH v3 0/7] Marvell NAND controller rework with ->exec_op()
boris.brezillon at free-electrons.com
Fri Jan 12 02:21:08 PST 2018
On Fri, 12 Jan 2018 10:34:13 +0100
Robert Jarzmik <robert.jarzmik at free.fr> wrote:
> Boris Brezillon <boris.brezillon at free-electrons.com> writes:
> > On Fri, 12 Jan 2018 09:09:17 +0100
> > Robert Jarzmik <robert.jarzmik at free.fr> wrote:
> >> Miquel RAYNAL <miquel.raynal at free-electrons.com> writes:
> >> I begun all your test procedure (on my zylonite board).
> >> The timing registers are the same in both pxa3xx_nand and marvell_nand, ie :
> >> [ 3.085539] Timing registers from Bootloader:
> >> [ 3.089971] - NDTR0: 0x00161c1c
> >> [ 3.095979] - NDTR1: 0x0f3c00a2
> >> I can attach the dmesg of the first run (dump of OOB). Yet I think you're
> >> missing the point as to where the bug lies.
> > We definitely don't know where the bug lies, otherwise we wouldn't do
> > the remote debug session we're doing here.
> Fair enough.
> > The driver is not searching for a BBT because it's explicitly disabled
> > in your pdata (if it was enabled we would see something like "Bad block
> > table not found ..." or "Bad block table found ..." in the logs).
> You're right, and that's because I was told to remove the "flash_bbt=1" from my
> platform data by Miquel in order to not destroy it again.
> > And that's anyway not the bug we're trying to fix here. In your setup (2k
> > pages with Hamming ECC), the bad block markers, i.e. the markers present in
> > each block and used to mark a block good or bad (0xffff => good, != 0xffff =>
> > bad), should be preserved.
> I think we're still not aligned here. There are _no_ bad block markers in the
> OOB on my flash, because there is a BBT at the end.
I think I'm still missing something. If I look at the branch you just
pushed, I see that ->flash_bbt was not set to 1 before this commit ,
which means the pxa3xx driver was no setting the NAND_BBT_USE_FLASH
flag, which in turn means you were not using the on-flash-bbt.
When you test the old (pxa3xx) driver, are you sure you're testing
things with a mainline kernel? If you have extra commits on top of
mainline, can you push them somewhere?
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