[PATCH] mtd: nand: samsung: Disable subpage writes on E-die NAND
Ladislav Michl
ladis at linux-mips.org
Mon Jan 8 15:48:37 PST 2018
Samsung E-die SLC NAND manufactured using 21nm process supports only
1 partial program cycle, so disable subpage writes for it.
Manufacturing process is stored in lowest two bits of 5th ID byte.
Signed-off-by: Ladislav Michl <ladis at linux-mips.org>
---
Note: Patch generated and tested against next-20180108 on at91sam9g20
board with K9F1G08U0E.
drivers/mtd/nand/nand_samsung.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c
index f6b0a63a068c..9400b4a84243 100644
--- a/drivers/mtd/nand/nand_samsung.c
+++ b/drivers/mtd/nand/nand_samsung.c
@@ -92,10 +92,17 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
} else {
nand_decode_ext_id(chip);
- /* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */
- if (nand_is_slc(chip) && chip->id.data[1] == 0xDC) {
- chip->ecc_step_ds = 512;
- chip->ecc_strength_ds = 1;
+ if (nand_is_slc(chip)) {
+ /* K9F4G08U0D-S[I|C]B0(T00) */
+ if (chip->id.data[1] == 0xDC) {
+ chip->ecc_step_ds = 512;
+ chip->ecc_strength_ds = 1;
+ }
+
+ /* 21nm chips do not support partial page write */
+ if (chip->id.len > 4 &&
+ (chip->id.data[4] & GENMASK(1,0)) == 0x1)
+ chip->options |= NAND_NO_SUBPAGE_WRITE;
}
}
}
--
2.15.1
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