nand: denali: issue with 4.13
Oleksij Rempel
ore at pengutronix.de
Fri Sep 22 00:34:56 PDT 2017
Hi,
On Thu, Sep 21, 2017 at 08:00:34PM +0900, Masahiro Yamada wrote:
> Hi.
>
> 2017-09-21 15:44 GMT+09:00 Oleksij Rempel <ore at pengutronix.de>:
> > Hi Masahiro,
> >
> > you are probably the expert of denali nand driver.
> > With kernel v4.13 i have following issue, it works on FPGASoC 5CSEBA5U...
> > but is now working on FPGASoC 5CSXFC6C6U... both of them have same NAND
> > chip, and seems to have similar IP core.
> >
> > FPGASoC 5CSXFC6C6U...:
> > ====================================================================
> > [ 0.095899] console [ttyS0] disabled
> > [ 0.095941] ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 38,
> > base_baud = 6250000) is a 16550A
> > [ 0.702041] console [ttyS0] enabled
> > [ 0.706986] brd: module loaded
> > [ 0.716232] loop: module loaded
> > [ 0.720074] nand: device found, Manufacturer ID: 0x00, Chip ID: 0x2c
>
>
> This line is strange. It failed to read Manufacturer ID.
> The 0x2c should be Manufacturer ID, not Chip ID.
>
>
> I am guessing we need to wait a bit
> after the NAND_CMD_READID.
>
> Please try the following ugly patch.
Suddenly this patch makes no difference.
the initial patch was describing an issue with interrupts:
============================================================================
FogBugz #163905: Support Denali NAND driver on socfpga platform
This patch addresses a few bugs and features in the Denali NAND
driver on the socfpga platform.
First the bugs:
- Reading ONFI parameters would cause a timeout, because
the code sent the wrong commands to the controller/device. That was
fixed, and in the process, code was added to wait for the appropriate interrupt.
============================================================================
>
>
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index bcc8cef1..2443e3d 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -744,10 +744,11 @@ static void nand_command(struct mtd_info *mtd,
> unsigned int command,
> case NAND_CMD_ERASE2:
> case NAND_CMD_SEQIN:
> case NAND_CMD_STATUS:
> - case NAND_CMD_READID:
> case NAND_CMD_SET_FEATURES:
> return;
> -
> + case NAND_CMD_READID:
> + udelay(5);
> + return;
> case NAND_CMD_RESET:
> if (chip->dev_ready)
> break;
> @@ -874,10 +875,11 @@ static void nand_command_lp(struct mtd_info
> *mtd, unsigned int command,
> case NAND_CMD_ERASE2:
> case NAND_CMD_SEQIN:
> case NAND_CMD_STATUS:
> - case NAND_CMD_READID:
> case NAND_CMD_SET_FEATURES:
> return;
> -
> + case NAND_CMD_READID:
> + udelay(5);
> + return;
> case NAND_CMD_RNDIN:
> nand_ccs_delay(chip);
> return;
>
>
>
> --
> Best Regards
> Masahiro Yamada
>
>
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