[PATCH] Documentation: binding: Update endianness usage

[Scott Wood]

On Wed, 2017-11-29 at 16:57 +0530, Prabhakar Kushwaha wrote:
> IFC controller version < 2.0 support IFC register access as
> big endian. These controller version also require IFC NOR signals to
> be connected in reverse order with NOR flash.
> 
> IFC >= 2.0 is other way around.
> 
> So updating IFC binding to take care of both using endianness field.
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
> ---
>  Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-
> controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-
> controllers/fsl/ifc.txt
> index 89427b0..824a2ca 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
> @@ -18,8 +18,10 @@ Properties:
>                interrupt (NAND_EVTER_STAT).  If there is only one,
>                that interrupt reports both types of event.
>  
> -- little-endian : If this property is absent, the big-endian mode will
> -                  be in use as default for registers.
> +- little-endian or big-endin : It represents how IFC registers  to be
> accessed.
> +			It also represents connection between controller
> and
> +			NOR flash. If this property is absent, the big-
> endian
> +			mode will be in use as default.

"endin"?

If big endian is the default, is this change really necessary?  Particularly
since the big endian chips are older and thus have existing device trees.

-Scott