[RESEND PATCH v2 50/53] mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
Masahiro Yamada
yamada.masahiro at socionext.com
Wed Mar 22 17:17:59 PDT 2017
Commit 66507c7bc889 ("mtd: nand: Add support to use nand_base poi
databuf as bounce buffer") fixed the issue that drivers can be
passed with a kmap()'d buffer. This addressed the use_bufpoi = 0
case.
When use_bufpoi = 1, chip->buffers->databuf is used. The databuf
allocated by nand_scan_tail() is not suitable for DMA due to the
offset, sizeof(*chip->buffers).
So, drivers using DMA are very likely to end up with setting the
NAND_OWN_BUFFERS flag and allocate buffers by themselves. Drivers
tend to use devm_k*alloc to simplify the probe failure path, but
devm_k*alloc() does not return a cache line aligned buffer.
If used, it could violate the DMA-API requirement stated in
Documentation/DMA-API.txt:
Warnings: Memory coherency operates at a granularity called the
cache line width. In order for memory mapped by this API to
operate correctly, the mapped region must begin exactly on a cache
line boundary and end exactly on one (to prevent two separately
mapped regions from sharing a single cache line).
To sum up, NAND_OWN_BUFFERS is not very convenient for drivers.
nand_scan_tail() can give a separate buffer for each of ecccalc,
ecccode, databuf. It is guaranteed kmalloc'ed memory is aligned
with ARCH_DMA_MINALIGN. This is enough for most drivers because
it is rare that DMA engines require larger alignment than CPU's
cache line.
Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---
Changes in v2:
- Newly added
drivers/mtd/nand/nand_base.c | 34 +++++++++++++++++++++++++++-------
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index e13f959..6fc0422 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -4614,13 +4614,25 @@ int nand_scan_tail(struct mtd_info *mtd)
}
if (!(chip->options & NAND_OWN_BUFFERS)) {
- nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize
- + mtd->oobsize * 3, GFP_KERNEL);
+ nbuf = kzalloc(sizeof(*nbuf), GFP_KERNEL);
if (!nbuf)
return -ENOMEM;
- nbuf->ecccalc = (uint8_t *)(nbuf + 1);
- nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;
- nbuf->databuf = nbuf->ecccode + mtd->oobsize;
+ nbuf->ecccalc = kmalloc(mtd->oobsize, GFP_KERNEL);
+ if (!nbuf->ecccalc) {
+ ret = -EINVAL;
+ goto err_free;
+ }
+ nbuf->ecccode = kmalloc(mtd->oobsize, GFP_KERNEL);
+ if (!nbuf->ecccode) {
+ ret = -EINVAL;
+ goto err_free;
+ }
+ nbuf->databuf = kmalloc(mtd->writesize + mtd->oobsize,
+ GFP_KERNEL);
+ if (!nbuf->databuf) {
+ ret = -EINVAL;
+ goto err_free;
+ }
chip->buffers = nbuf;
} else {
@@ -4863,8 +4875,12 @@ int nand_scan_tail(struct mtd_info *mtd)
/* Build bad block table */
return chip->scan_bbt(mtd);
err_free:
- if (!(chip->options & NAND_OWN_BUFFERS))
+ if (!(chip->options & NAND_OWN_BUFFERS)) {
+ kfree(chip->buffers->databuf);
+ kfree(chip->buffers->ecccode);
+ kfree(chip->buffers->ecccalc);
kfree(chip->buffers);
+ }
return ret;
}
EXPORT_SYMBOL(nand_scan_tail);
@@ -4915,8 +4931,12 @@ void nand_cleanup(struct nand_chip *chip)
/* Free bad block table memory */
kfree(chip->bbt);
- if (!(chip->options & NAND_OWN_BUFFERS))
+ if (!(chip->options & NAND_OWN_BUFFERS)) {
+ kfree(chip->buffers->databuf);
+ kfree(chip->buffers->ecccode);
+ kfree(chip->buffers->ecccalc);
kfree(chip->buffers);
+ }
/* Free bad block descriptor memory */
if (chip->badblock_pattern && chip->badblock_pattern->options
--
2.7.4
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