[PATCH 4/5] mtd: nand: add support for Micron on-die ECC

[Bean Huo (beanhuo)]

Hi Boris

>>
>> For the Micron SLC NAND with on Die ECC, please note only for the "SLC
>> NAND with on Die ECC", You can always differentiate these two
>> generation NAND by ONFI table byte 112 "Number of bits ECC
>> correctability ", if its value is 4, it is 60s; if it's 8, it is 70s. this is a permanent
>method for both 60s and 70s "SLC NAND with on Die ECC".
>
>The question is, how can we know if the NAND supports on-die ECC?
>
>We were basing our detection on the "Internal ECC" bit in READ_ID, but it seems
>this bit is actually reflecting the current ECC engine status (enabled/disabled),
>which is disturbing, since information returned by the READ_ID are supposed to
>be static :-(.
>

This is very difficult question, as a Micron worker, this is also a headache to me.
Device ID byte 4 can't be fully trusted, it always changes. Anyway, I will give you
A better answer in 2 days. Hopefully.