[PATCH v6 16/17] mtd: nand: hynix: Rework NAND ID decoding to extract more information

Boris Brezillon boris.brezillon at free-electrons.com
Tue Jan 10 01:07:07 PST 2017


Hi Julia,

On Mon, 9 Jan 2017 21:21:27 +0100 (CET)
Julia Lawall <julia.lawall at lip6.fr> wrote:

> It looks odd that lines 158 and 160 are the same.

Indeed, it should be 'chip->ecc_step_ds = 1024;' in the else branch.
I'll fix that.

Thanks,

Boris

> 
> julia
> 
> ---------- Forwarded message ----------
> 
> In-Reply-To: <1483956264-3335-17-git-send-email-boris.brezillon at free-electrons.com>
> 
> Hi Boris,
> 
> [auto build test WARNING on mtd/master]
> [also build test WARNING on v4.10-rc3 next-20170106]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
> 
> url:    https://github.com/0day-ci/linux/commits/Boris-Brezillon/mtd-nand-allow-vendor-specific-detection-initialization/20170110-022221
> base:   git://git.infradead.org/linux-mtd.git master
> :::::: branch date: 2 hours ago
> :::::: commit date: 2 hours ago
> 
> >> drivers/mtd/nand/nand_hynix.c:157:4-6: WARNING: possible condition with no effect (if == else)  
> 
> git remote add linux-review https://github.com/0day-ci/linux
> git remote update linux-review
> git checkout ee58e9ecc231f4a40ff46fe95078d7796ebe430b
> vim +157 drivers/mtd/nand/nand_hynix.c
> 
> ee58e9ec Boris Brezillon 2017-01-09  141  			 */
> ee58e9ec Boris Brezillon 2017-01-09  142  			WARN(1, "Invalid ECC requirements");
> 1065fa22 Boris Brezillon 2017-01-09  143  		}
> ee58e9ec Boris Brezillon 2017-01-09  144  	} else {
> ee58e9ec Boris Brezillon 2017-01-09  145  		/*
> ee58e9ec Boris Brezillon 2017-01-09  146  		 * The ECC requirements field meaning depends on the
> ee58e9ec Boris Brezillon 2017-01-09  147  		 * NAND technology.
> ee58e9ec Boris Brezillon 2017-01-09  148  		 */
> ee58e9ec Boris Brezillon 2017-01-09  149  		u8 nand_tech = chip->id.data[5] & 0x3;
> 1065fa22 Boris Brezillon 2017-01-09  150
> ee58e9ec Boris Brezillon 2017-01-09  151  		if (nand_tech < 3) {
> ee58e9ec Boris Brezillon 2017-01-09  152  			/* > 26nm, reference: H27UBG8T2A datasheet */
> ee58e9ec Boris Brezillon 2017-01-09  153  			if (ecc_level < 5) {
> ee58e9ec Boris Brezillon 2017-01-09  154  				chip->ecc_step_ds = 512;
> ee58e9ec Boris Brezillon 2017-01-09  155  				chip->ecc_strength_ds = 1 << ecc_level;
> ee58e9ec Boris Brezillon 2017-01-09  156  			} else if (ecc_level < 7) {
> ee58e9ec Boris Brezillon 2017-01-09 @157  				if (ecc_level == 5)
> ee58e9ec Boris Brezillon 2017-01-09  158  					chip->ecc_step_ds = 2048;
> 1065fa22 Boris Brezillon 2017-01-09  159  				else
> ee58e9ec Boris Brezillon 2017-01-09  160  					chip->ecc_step_ds = 2048;
> ee58e9ec Boris Brezillon 2017-01-09  161  				chip->ecc_strength_ds = 24;
> ee58e9ec Boris Brezillon 2017-01-09  162  			} else {
> ee58e9ec Boris Brezillon 2017-01-09  163  				/*
> ee58e9ec Boris Brezillon 2017-01-09  164  				 * We should never reach this case, but if that
> ee58e9ec Boris Brezillon 2017-01-09  165  				 * happens, this probably means Hynix decided
> 
> ---
> 0-DAY kernel test infrastructure                Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all                   Intel Corporation




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