[PATCH v3 1/2] mtd: spi-nor: Fix whole chip erasing for stacked chips.
Cyrille Pitchen
cyrille.pitchen at microchip.com
Fri Jan 6 07:03:46 PST 2017
Hi Marcin,
You have many typos in your commit message:
Le 06/01/2017 à 14:03, Marcin Krzeminski a écrit :
> Curretly it is possible to disable chip erase for spi-nor driver.
Currently
> Some modern stacked (multi die) flash chips does not support chip
do not support
> erase opcode at all but spi-nor framework need to cope with them too.
needs to
> This commit extend exising functionality to allow disable
extends existing
> chip erase for a single flash chip.
>
> Signed-off-by: Marcin Krzeminski <mar.krzeminski at gmail.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 15fb8af..b6656b2 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -81,6 +81,7 @@ struct flash_info {
> * because it has the same value as
> * ATMEL flashes)
> */
> +#define NO_CHIP_ERASE BIT(10) /* Chip does not support chip erase */
> };
>
Sorry but since yesterday, this can't apply to the github spi-nor tree:
I've merged the "mtd: spi-nor: add a stateless method to support memory
size above 128Mib" patch, which already defines a new macro with the
BIT(10) value.
> #define JEDEC_MFR(info) ((info)->id[0])
> @@ -1545,6 +1546,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
> nor->flags |= SNOR_F_USE_FSR;
> if (info->flags & SPI_NOR_HAS_TB)
> nor->flags |= SNOR_F_HAS_SR_TB;
> + if (info->flags & NO_CHIP_ERASE)
> + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
>
> #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
> /* prefer "small sector" erase if possible */
>
Best regards,
Cyrille
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