[PATCH v6 00/15] A SPI NAND framework under generic NAND framework

[Boris Brezillon]

Hi Peter,

Can you please try to fix your mailer so that we can distinguish what
is quoted from what you add?

On Tue, 5 Dec 2017 01:35:05 +0000
Peter Pan 潘栋 (peterpandong) <peterpandong at micron.com> wrote:

> 
> I’m still waiting for your git branch for spi NAND. Is this the branch
> I’m waiting for?

Yes, it's the branch I promised to share with you, but I didn't
communicate on it since it's not yet in a clean state (still have to
add kerneldoc headers, test everything, provide proper commit
message, fix authorship, ...).

> I just took a quick look at
> it and I found you put more common code into new Nand core. This is
> cool. I thought we will do this job after spi NAND being merged.

Well, I don't think there's more code than before, it's just that I
reworked the logic so that it could be more useful to other NAND
sub-layers.

> Anyway, do you want both spi and raw NAND code to be rebased on new
> NAND core or we just put spi NAND in?

That's another decision I took in this rework: I want to keep existing
raw/parallel NAND framework unchanged, because it's a real pain to
validate that everything works as expected when you do such invasive
changes as the bbt rework we had done in earlier versions of this
series.

> Anything I can help to speed the
> spi NAND merge up?

Testing and reviewing, as usual. I'd really like to get the preparation
patches (all patches touching mtd core code) in 4.16. For the rest, it
really depends how much time you and other contributors (including me)
can spend testing/reviewing/fixing/documenting the code.

I am totally aware that I'm the one blocking the progress on this
framework because of my constant hesitations on what the generic NAND
layer should look like, but I'm a bit more confident now that we
isolated the raw NAND code from the generic NAND changes (less risks of
breaking existing NAND users).

Regards,

Boris