[PATCH 07/10] mtd: spi-nor: aspeed: configure chip window on AHB bus

[Marek Vasut]

On 04/11/2017 12:20 PM, Cédric Le Goater wrote:
[...]
>>> +static u32 aspeed_smc_chip_set_segment(struct aspeed_smc_chip *chip)
>>> +{
>>> +	struct aspeed_smc_controller *controller = chip->controller;
>>> +	u32  val0, start0, start;
>>> +	u32 size = chip->nor.mtd.size;
>>> +
>>> +	/* The AST2500 SPI controller has a bug when the CE0 chip size
>>> +	 * exceeds 120MB.
>>
>> 120 or 128 ?
> 
> 120. This is a HW bug.
> 
Please note that in the comment then .


-- 
Best regards,
Marek Vasut