[PATCH 04/10] mtd: spi-nor: aspeed: add support for SPI dual IO read mode

[Marek Vasut]

On 04/06/2017 06:56 PM, Cédric Le Goater wrote:
> From: Robert Lippert <roblip at gmail.com>
> 
> Implements support for the dual IO read mode on aspeed SMC/FMC
> controllers which uses both MISO and MOSI lines for data during a read
> to double the read bandwidth.
> 
> Signed-off-by: Robert Lippert <rlippert at google.com>
> [clg: adapted to mainline driver ]
> Signed-off-by: Cédric Le Goater <clg at kaod.org>
> ---
>  drivers/mtd/spi-nor/aspeed-smc.c | 20 +++++++++++++-------
>  1 file changed, 13 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
> index 7dfa1ea0a787..b3c8cfe29765 100644
> --- a/drivers/mtd/spi-nor/aspeed-smc.c
> +++ b/drivers/mtd/spi-nor/aspeed-smc.c
> @@ -512,6 +512,7 @@ static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from,
>  	int i;
>  	u8 dummy = 0xFF;
>  	int ret;
> +	u32 ctl;
>  
>  	if (aspeed_smc_dma_check(chip, from, len)) {
>  		ret = aspeed_smc_dma_start(chip, from, read_buf, len, 0);
> @@ -525,6 +526,13 @@ static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from,
>  	for (i = 0; i < chip->nor.read_dummy / 8; i++)
>  		aspeed_smc_write_to_ahb(chip->ahb_base, &dummy, sizeof(dummy));
>  
> +	if (chip->nor.flash_read == SPI_NOR_DUAL) {
> +		/* Switch to dual I/O mode for data cycle */
> +		ctl = readl(chip->ctl) & ~CONTROL_IO_MODE_MASK;
> +		ctl |= CONTROL_IO_DUAL_DATA;
> +		writel(ctl, chip->ctl);
> +	}
> +
Can't you switch the mode at runtime ? If you do, who'll clear the
CONTROL_IO_DUAL_DATA in this ctl register if you switch to SINGLE
mode for some command ?

-- 
Best regards,
Marek Vasut