[PATCH v8 0/3] mtd: Qualcomm NAND controller driver

Brian Norris computersforpeace at gmail.com
Thu Mar 10 11:47:31 PST 2016


On Wed, Feb 03, 2016 at 02:29:48PM +0530, Archit Taneja wrote:
> Add support for the NAND controller driver for SoC's that contain EBI2.
> For now, the only SoC upstream that has EBI2 is IPQ806x.
> 
> The previous version added a BBT flag that allowed BBMs to be accessed
> in raw mode. Adding a flag isn't the right way to fix it, and the
> proposed fix is to add badblockbits support, and make sure all drivers
> switch to accessing BBM in raw mode. For now, skip nand_bbt usage, and
> implement our own versions of chip->block_bad and chip->mark_bad.
> 
> The first patch in the series contains a nand_base clean up which the
> driver will utilize.
> 
> Based over l2-mtd.git
> 
> The patchset requires the v6 ADM dmaengine patches posted by Andy:
> 
> https://lkml.org/lkml/2015/3/17/19

Pushed to l2-mtd.git, with the following fixup (the layout->oobavail
field has been dropped):

diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 78dc790ae619..f550a57e6eea 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -1733,7 +1733,6 @@ qcom_nand_create_layout(struct qcom_nand_host *host)
 
 	layout->oobfree[0].offset = (steps - 1) * ecc->bytes + host->bbm_size;
 	layout->oobfree[0].length = steps << 2;
-	layout->oobavail = steps << 2;
 
 	/*
 	 * the oob bytes in the first n - 1 codewords are all grouped together



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