PMEM, DAX, MTD, and the quest for the Theory of Everything

[Chris Brandt]

> So I CC:ed Chris Brandt because he's been working on AXFS with me
> lately on a very cool set of deep embedded applications where RAM
> is scarce

As a point of reference in an embedded system, this is how I'm using it:


The Renesas RZ/A1 MPU (400MHz Cortex A9) comes with either 3MB,5MB or 10MB internal RAM.
The quad SPI controllers (2 QSPIs can be connected to 1 channel...hence 8 bits of data per clock) on it will memory map QSPI devices into internal linear address space (as in, looks like a parallel NOR flash) and will also allow the CPU to XIP directly from the serial flash. These are not 'block' accesses, they are direct (as far as the CPU is concerned).

What I found is that if you run an XIP_KERNEL (XIP from QSPI) and all your application code (XIP from QSPI using AXFS), you can do a lot with only 3/5/10MB of RAM. And from there, you just pick the size QSPI device you need depending on what applications to plan on running.

So..
 - read-only XIP/DAX of code pages are fine
 - block accesses not required


Of course the upstream XIP_KERNEL code for ARMV7 has been broken for years, and I haven't been able to successfully get the fixes back in....but that's a different topic.


Chris