How read_oob() should work for HW_SYNDROME NAND controller?

Masahiro Yamada yamada.masahiro at socionext.com
Thu Dec 1 01:09:37 PST 2016


Hi Boris,


>>
>> And let's say the controller's ecc.size = 1024 and ecc.bytes == 14.
>> I am omitting BBM to make the situation simpler.
>
> Hm, actually the placement of the BBM is important. Do you know where
> it's placed in the page layout used by Denali.


BBM is placed at the beginning of the OOB area.
(so, factory BBMs are protected from the ECC correction engine.)


The more precise layout is as follows:

   |-----------|    |-----------|
   |           |    |           |
   | Payload0  |    |           |
   |           |    |           |
   | (ecc.size |    |           |
   |  1024B)   |    | Main Page |
   |           |    |   area    |
   |-----------|    |           |
   |  ECC0     |    |   2048B   |
   | (ecc.bytes|    |           |
   |   14B)    |    |           |
   |-----------|    |           |
   |           |    |           |
   | Payload1  |    |           |
   |           |    |           |
   | (ecc.size |    |           |
   |  1010B)   |    |           |
   |-----------|    |-----------|
   | BBM (8B)  |    |           |
   |-----------|    |           |
   | Payload1  |    |           |
   |   14B     |    |           |
   |-----------|    |           |
   |  ECC1     |    | OOB area  |
   | (ecc.bytes|    |           |
   |   14B)    |    |   64B     |
   |-----------|    |           |
   | OOB free  |    |           |
   |    28B    |    |           |
   |-----------|    |-----------|


The Playload1 is split by the BBM area.




>> The Denali IP also supports lowlevel
>> command-base interface to issue NAND_CMD_RNDOUT
>> and cherry-pick ECC sections.
>>
>> But, more simply, I can transfer the whole page + oob
>> into a temporary buffer, then only copy
>> ECC sections into oob_poi.
>
> It should be faster if you only retrieve ECC sections (less I/Os), but
> that's just optimization. Note that read_oob() is heavily used when
> scanning bad blocks, so it might make a huge boot-time difference in the
> end.


I think this comes down to

"PIO register access only for ECC sectors"
    vs
"DMA transfer for the whole page"

I will test which is better.


BTW, surprisingly enough, the Denali still sets
NAND_SKIP_BBTSCAN flag.



-- 
Best Regards
Masahiro Yamada



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