[PATCH v5 8/8] spi: nsp-qspi: Add Broadcom NSP, NS2, Cygnus SoC support

[Mark Brown]

On Fri, Aug 19, 2016 at 11:43:24AM -0400, Kamal Dasu wrote:
> On Tue, Aug 16, 2016 at 2:40 PM, Mark Brown <broonie at kernel.org> wrote:

> > I am confused why we are parsing the interrupt-names property here?

> For Muxed L1 single source interrupt, there is only one irq, and  SoCs
> could use a different different name wanted to use that name. But I
> could force a name as well.

Either don't use names or force a name, trying to mix the two is just
messy.

> >> +     /*
> >> +      * Some SoCs integrate spi controller (e.g., its interrupt bits)
> >> +      * in specific ways
> >> +      */
> >> +     if (soc) {
> >> +             qspi->soc = soc;
> >> +             soc->bcm_qspi_int_set(soc, MSPI_DONE, true);
> >> +     } else {
> >> +             qspi->soc = NULL;
> >> +     }

> > The variable name "soc" here doesn't seem hugely descriptive when it's
> > just for the interrupt controller.

> Named it that way since it could potentially have other SoC specific
> settings for spi master bus needed in future.

But then that'll break this code - if it's going to be a feature flag
bitmask or something like that it should have an appropriate name and be
used in a way that reflects this.
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