[PATCH v6 05/17] memory: omap-gpmc: Implement IRQ domain for NAND IRQs

[Rob Herring]

On Thu, Apr 07, 2016 at 01:08:23PM +0300, Roger Quadros wrote:
> GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount.
> Use IRQ domain for this. NAND device tree node can then
> get the necessary interrupts by using gpmc as the interrupt parent.
> 
> Legacy boot uses gpmc_get_client_irq to get the
> NAND interrupts from the GPMC IRQ domain.
> Get rid of custom bitmasks and use IRQ domain for that
> as well.
> 
> Signed-off-by: Roger Quadros <rogerq at ti.com>
> ---
>  Documentation/devicetree/bindings/bus/ti-gpmc.txt |   8 +

Acked-by: Rob Herring <robh at kernel.org>

>  drivers/memory/omap-gpmc.c                        | 246 ++++++++++++----------
>  include/linux/omap-gpmc.h                         |   5 +-
>  3 files changed, 144 insertions(+), 115 deletions(-)