UBI on dual NAND chips

[Nathan Williams]

Hi,

We are planning to use two 32GiB MLC NAND flash chips in a product using
a SoC FPGA with two NAND interfaces. The motivation for wanting to use
multiple NAND chips is to improve reliability, not capacity.

>From what I've read, it's possible to use UBI on a concatenated MTD.
If I have two identical chips, will these be concatenated automatically?

Is creating a single UBI volume over the two NAND chips (and using UBIFS
on it) the best way to make use of a redundant NAND chip? Would
mirroring data on a second UBI volume offer additional improvements to
data reliability?

Also, what's the current status of the "unstable bits issue"?

Thanks,
Nathan