[PATCH] mtd: nand: fsmc: Add BCH4 SW ECC support for SPEAr600

Stefan Roese sr at denx.de
Fri Oct 2 03:33:58 PDT 2015


Hi Brian,

On 29.09.2015 02:21, Brian Norris wrote:
> On Wed, Sep 02, 2015 at 11:53:01AM +0200, Stefan Roese wrote:
>> This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can
>> be used by boards equipped with a NAND chip that requires 4-bit ECC
>> strength. The SPEAr600 HW ECC only supports 1-bit ECC strength.
>>
>> To enable SW BCH4, you need to specify this in your nand controller
>> DT node:
>>
>> 	nand-ecc-mode = "soft_bch";
>
> Please update the DT binding file, referring to nand.txt. Just specify
> your additional restrictions (like, should be "soft_bch" or "hw").
>
> Also please use nand-ecc-strength and nand-ecc-size; see below.

Thanks for the review. I'll send a new patch (series) out shortly,
addressing all your comments and suggestions.

Thanks,
Stefan




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