[PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode

Brian Norris computersforpeace at gmail.com
Mon Nov 30 17:53:02 PST 2015


On Mon, Nov 16, 2015 at 10:05:39PM +0000, Simon Arlott wrote:
> If an error occurs in flash above 4GB in PIO mode then the EXT_ADDR
> registers will be set to the location of the error and never cleared.
> 
> Reset them to 0 before reading.
> 
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> ---
>  drivers/mtd/nand/brcmnand/brcmnand.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> index 12c6190..2c8f67f 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -1400,6 +1400,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
>  	/* Clear error addresses */
>  	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
>  	brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
> +	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0);
> +	brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0);
>  
>  	brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
>  			(host->cs << 16) | ((addr >> 32) & 0xffff));

Applied to l2-mtd.git



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