pxa3xx_nand and ECC 8 bit mode

Ezequiel Garcia ezequiel at vanguardiasur.com.ar
Tue May 12 10:00:14 PDT 2015


Ccing Boris, Antoine, and the MTD folks.

On 05/12/2015 01:39 PM, a.lombardinilo wrote:
> Hi Ezequiel,
> 
> first of all I apologize for this: I wanted to write on mailng list, but
> I did not understand how.
> 
> I have a custom board based on armada 370 processor (mv88F6710) and
> Micron MT29F8G08ABACAWP in 8BIT mode.
> 
> I use u-boot from Marvell version: v2011.12 2014_T2.0p1 and linux-3.18.11.
> 
> The Bad Block Table written by u-boot is not readed from the kernel and
> vice versa.
> If I set a 4 bit ECC, the BBT is readed, but warning is displayed:
> "the ECC used on your system is too weaj compared to the one required by
> the NAND chip"
> 
> Basically I think there is a bug/unsupported features in the pxa3xx_nand
> driver.
> 

It seems the bootloader and kernel ECC setup is mismatching. You can
either do:

*) update your bootloader to match the kernel ECC setup, and the flash
requirement.

*) use the weaker ECC setup, and live a life of danger :)

> Can you help me to fix it or show me how to get support from the mailing
> list
> 

I just did the latter.

-- 
Ezequiel Garcia, VanguardiaSur
www.vanguardiasur.com.ar



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