[PATCH v2] mtd: nand: pxa3xx: fix build on ARM64

[Brian Norris]

On Thu, Apr 30, 2015 at 03:17:47PM -0500, Rob Herring wrote:
> In preparation to enable ARCH_MMP on ARM64, a couple of fixes are needed
> to build the pxa3xx_nand driver:
> 
> Legacy DMA will only used on ARM, so also make it condtional on
> CONFIG_ARM.
> __raw_{read,write}sl are not available on ARM64 or generically, so use
> the readsl/writesl variants instead. Somewhat inconsistently,
> {read,write}sl are inherently non-swapping with the generic version
> using __raw_{read,write}l.
> 
> Signed-off-by: Rob Herring <robh at kernel.org>
> Acked-by: Ezequiel Garcia <ezequiel.garcia at free-electrons.com>
> Cc: David Woodhouse <dwmw2 at infradead.org>
> Cc: Brian Norris <computersforpeace at gmail.com>
> Cc: linux-mtd at lists.infradead.org
> ---
> This never got applied. It is essentially the same as v1, but I added 
> some more explanation that {read,write}sl are inherently non-swapping 
> and I dropped an unneeded cast.

Applied to l2-mtd.git. Squashed this in too:

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 291396eaf896..1259cc558ce9 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -496,7 +496,7 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
 		 * the polling on the last read.
 		 */
 		while (len > 8) {
-			__raw_readsl(info->mmio_base + NDDB, data, 8);
+			readsl(info->mmio_base + NDDB, data, 8);
 
 			ret = readl_relaxed_poll_timeout(info->mmio_base + NDSR, val,
 							 val & NDSR_RDDREQ, 1000, 5000);