[PATCH V6 1/2] mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver.

[Marek Vasut]

On Tuesday, July 28, 2015 at 07:38:02 PM, Graham Moore wrote:

A commit message would be really nice :-)

> Signed-off-by: Graham Moore <grmoore at opensource.altera.com>
> ---
> V2: Add cdns prefix to driver-specific bindings.
> V3: Use existing property "is-decoded-cs" instead of creating a duplicate,
> "ext-decoder".  Timing parameters are in nanoseconds, not master reference
> clocks.  Remove bus-num completely.
> V4: Add new properties fifo-width and trigger-address
> ---
>  .../devicetree/bindings/mtd/cadence_quadspi.txt    |   54
> ++++++++++++++++++++ 1 file changed, 54 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/mtd/cadence_quadspi.txt
> 
> diff --git a/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt
> b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt new file mode
> 100644
> index 0000000..d7e6fdd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt
> @@ -0,0 +1,54 @@
> +* Cadence Quad SPI controller
> +
> +Required properties:
> +- compatible : Should be "cdns,qspi-nor".
> +- reg : Contains two entries, each of which is a tuple consisting of a
> +	physical address and length.  The first entry is the address and
> +	length of the controller register set.  The second entry is the
> +	address and length of the QSPI Controller data area.
> +- interrupts : Unit interrupt specifier for the controller interrupt.
> +- clocks : phandle to the Quad SPI clock.
> +- fifo-depth : Size of the data FIFO in words.

This and the following two are absolutelly Cadence specific, so prefix
them that way please:

cdns,fifo-depth

> +- fifo-width: Bus width of the data FIFO in bytes.

cdns,fifo-width

> +- trigger-address : 32-bit indirect AHB trigger address.

cdns,trigger-address

What is this address exactly? Is this documented somewhere what the value
should be precisely ?

[...]