[RFC] How to configure nand address cycles in a generic way
punnaiah choudary kalluri
punnaia at xilinx.com
Wed Feb 25 07:44:06 PST 2015
We are using pl353 smc controller in our zynq soc and currently the
patches for this driver
are under review. Till now we have tested various nand parts (micron
and all these devices require five address cycles for read/write
operations (3 row and 2 column address cycles).Even in our driver the
address cycles value is hard coded to five.
Recently we come across testing the new part i.e Spansion S34ML01G
and this devices requires four address cycles( 2 row and 2 column
cycles) so, now we want to generalize this by reading the address
cycles information from the onfi parameter page.
I see that the controller driver can retrieve the address cycles
information from the nand_onfi_params structure. But the number of
address cycles to be configured is different for different commands.
Page read/write operation: row + col address cycles
Block erase : row address cycles
onfi parameter page : one address cycles.
Currently in our driver we are reading the address cycles information
from the nand_onfi_params structure and deriving the required address
cycles based on the given command. Ideally this information should
come from the nand core. So, one way i thought that the core should
required address cycles using the cmdfuncion as below. so the
controller driver can blindly program this information to the
void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
int page_addr, int address_cycles);
Please suggest is there any better solution to handle this case ?
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