[PATCH 2/2] mtd: spi-nor: add new device MT35X

Brian Norris computersforpeace at gmail.com
Wed Dec 9 18:47:28 PST 2015


On Thu, Dec 10, 2015 at 01:59:00AM +0000, Karl Zhang wrote:
> Micron has announced a new SPI NOR device MT35X(XTRMFlash).
> The device can support x1 or x8 bus I/O for high speed.
> 
> This patch is purpose to add MT35X into the arch, only
> extended mode (x1) was enabled. Octal mode I/O will be done
> in the futrue.
> 
> Signed-off-by: Karl Zhang <karlzhang at micron.com>
> ---
>  drivers/mtd/devices/m25p80.c  | 1 +
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
> index c9c3b7f..e57d391 100644
> --- a/drivers/mtd/devices/m25p80.c
> +++ b/drivers/mtd/devices/m25p80.c
> @@ -259,6 +259,7 @@ static const struct spi_device_id m25p_ids[] = {
>  	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},	{"mx25l12805d"},
>  	{"mx25l25635e"},{"mx66l51235l"},
>  	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
> +	{"mt35x512"},

Did you read the text above this array?

Brian

>  	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
>  	{"s25fl064k"},
>  	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 3b2460e..34686b5 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -192,6 +192,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
>  
>  	switch (JEDEC_MFR(info)) {
>  	case SNOR_MFR_MICRON:
> +	case SNOR_MFR_MICRON_JEDEC:
>  		/* Some Micron need WREN command; all will accept it */
>  		need_wren = true;
>  	case SNOR_MFR_MACRONIX:
> @@ -756,6 +757,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>  	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>  	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
> +	{ "mt35x512",    INFO(0x2c5b1a, 0, 128 * 1024, 512, SECT_4K | USE_FSR) },
>  
>  	/* PMC */
>  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
> -- 
> 1.9.1
> 



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