[PATCH v9 2/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

[Harvey Hunt]

On 08/12/15 16:26, Boris Brezillon wrote:
> On Tue, 8 Dec 2015 16:03:55 +0000
> Harvey Hunt <harvey.hunt at imgtec.com> wrote:
>
>>>
>>> static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>>> 				 unsigned int ctrl)
>>> {
>>> 	struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd);
>>> 	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller);
>>> 	struct jz4780_nand_cs *cs;
>>>
>>> 	if (WARN_ON(nfc->selected < 0))
>>> 		return;
>>>
>>> 	cs = &nfc->cs[nfc->selected];
>>>
>>> 	if (ctrl & NAND_CTRL_CHANGE) {
>>> 		if (cmd != NAND_CMD_NONE) {
>>> 			if (ctrl & NAND_ALE)
>>> 				writeb(cmd, cs->base + OFFSET_ADDR);
>>> 			else if (ctrl & NAND_CLE)
>>> 				writeb(cmd, cs->base + OFFSET_CMD);
>>> 		}
>>>
>>> 		jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE);
>>> 	}
>>> }
>>>
>>
>> Okay, I understand your point now. I would also have to implement the
>> read/write functions to replace the defaults, correct? If so, it feels
>> strange to add functions to reimplement the default ones.
>>
>
> Actually it should be something like this, because NAND_CTRL_CHANGE is
> cleared after the first address cycle.
>
> static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>   				 unsigned int ctrl)
> {
> 	struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd);
> 	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller);
> 	struct jz4780_nand_cs *cs;
>
> 	if (WARN_ON(nfc->selected < 0))
> 		return;
>
> 	cs = &nfc->cs[nfc->selected];
>
> 	jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE);
>
>   	if (cmd == NAND_CMD_NONE)
> 		return;
>
> 	if (ctrl & NAND_ALE)
> 		writeb(cmd, cs->base + OFFSET_ADDR);
>   	else if (ctrl & NAND_CLE)
>   		writeb(cmd, cs->base + OFFSET_CMD);
> }
>

Thanks for the example code, I'll try it out for the next version.