[PATCH v9 2/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
Harvey Hunt
harvey.hunt at imgtec.com
Tue Dec 8 08:13:44 PST 2015
On 08/12/15 16:12, Boris Brezillon wrote:
> On Tue, 8 Dec 2015 16:03:55 +0000
> Harvey Hunt <harvey.hunt at imgtec.com> wrote:
>
>>>
>>> static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>>> unsigned int ctrl)
>>> {
>>> struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd);
>>> struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller);
>>> struct jz4780_nand_cs *cs;
>>>
>>> if (WARN_ON(nfc->selected < 0))
>>> return;
>>>
>>> cs = &nfc->cs[nfc->selected];
>>>
>>> if (ctrl & NAND_CTRL_CHANGE) {
>>> if (cmd != NAND_CMD_NONE) {
>>> if (ctrl & NAND_ALE)
>>> writeb(cmd, cs->base + OFFSET_ADDR);
>>> else if (ctrl & NAND_CLE)
>>> writeb(cmd, cs->base + OFFSET_CMD);
>>> }
>>>
>>> jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE);
>>> }
>>> }
>>>
>>
>> Okay, I understand your point now. I would also have to implement the
>> read/write functions to replace the defaults, correct? If so, it feels
>> strange to add functions to reimplement the default ones.
>
> I don't think you have to re-implement the {read,write}_{byte,buf,word}
> functions, because you'll still assign the ->IO_ADDR_W and ->IO_ADDR_R
> fields to cs->base + OFFSET_DATA in jz4780_nand_init_chip(), but maybe
> I'm missing something.
>
You're right, I forgot about that.
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