[PATCH linux-next v5 3/5] mtd: spi-nor: allow to tune the number of dummy cycles
Marek Vasut
marex at denx.de
Wed Aug 26 07:39:02 PDT 2015
On Wednesday, August 26, 2015 at 02:30:25 PM, Cyrille Pitchen wrote:
> The number of dummy cycles used during Fast Read commands can be reduced
> to improve transfer performances. Each manufacturer has a dedicated set of
> registers to provide the memory with the exact number of dummy cycles it
> should expect. Both the memory and the (Q)SPI controller must agree on
> this number of dummy cycles.
>
> The number of dummy cycles can be found into the memory datasheet and
> mostly depends on the SPI clock frequency, the Fast Read op code and the
> Single/Dual Data Rate mode.
>
> Probing JEDEC Serial Flash Discoverable Parameters (SFDP) tables would
> only provide the driver with a high enough number of dummy cycles for each
> Fast Read command to be used for all clock frequencies: this solution
> would not be optimized.
>
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen at atmel.com>
Acked-by: Marek Vasut <marex at denx.de>
Best regards,
Marek Vasut
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