[PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver

[Marek Vasut]

On Monday, August 17, 2015 at 06:03:38 PM, Brian Norris wrote:

Hi!

[...]

> > Hi Brian,
> > It is really unfortunate that this controller is not able to read full
> > JEDEC ID. It only can provide 1 byte ID. I did discuss with IP
> > designer about this, but it is really unfortunate that they are not
> > able to fix that issue. Hence it requires software to make changes.

Thanks for CCing me, I assume this is a driver for that "altera_epcq_controller"
which you can synthesise into your FPGA, is that correct? Is there an Hard IP 
variant of this controller in the public or is this purely Soft IP?

Also, I cannot find any documentation for this IP block even if I search through 
Quartus/QSys, is there any proper documentation available anywhere?

[...]

Best regards,
Marek Vasut