[PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform
Archit Taneja
architt at codeaurora.org
Tue Aug 4 08:05:10 PDT 2015
On 8/4/2015 1:05 AM, Andy Gross wrote:
> On Mon, Aug 03, 2015 at 10:38:18AM +0530, Archit Taneja wrote:
>> Enable the NAND controller node on the AP148 platform. Provide pinmux
>> information.
>>
>> Cc: devicetree at vger.kernel.org
>>
>> Signed-off-by: Archit Taneja <architt at codeaurora.org>
>> ---
>> arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
>> 1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
>> index 7f9ea50..2e88eff 100644
>> --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
>> +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
>> @@ -30,6 +30,28 @@
>> bias-none;
>> };
>> };
>> + nand_pins: nand_pins {
>> + mux {
>> + pins = "gpio34", "gpio35", "gpio36",
>> + "gpio37", "gpio38", "gpio39",
>> + "gpio40", "gpio41", "gpio42",
>> + "gpio43", "gpio44", "gpio45",
>> + "gpio46", "gpio47";
>> + function = "nand";
>> + drive-strength = <10>;
>> + bias-disable;
>> + };
>> + pullups {
>> + pins = "gpio39";
>> + bias-pull-up;
>> + };
>> + hold {
>> + pins = "gpio40", "gpio41", "gpio42",
>> + "gpio43", "gpio44", "gpio45",
>> + "gpio46", "gpio47";
>> + bias-bus-hold;
>
> Maybe split out the bias-disable into a separate set and remove that property
> from the mux.
I'll fix this.
Thanks,
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
More information about the linux-mtd
mailing list