Missing support for ECC_SOFT_BCH in fsl-elbc-nand

[Tomas Hlavacek]

Hi!

On Monday, April 13, 2015 9:12:33 PM CEST, Scott Wood wrote:
> On Mon, 2015-04-13 at 00:30 +0200, Tomas Hlavacek wrote:
>> 1) How to disable HW ECC?
>> 
>> What I have done is this:
>> 
>> diff --git a/drivers/mtd/nand/fsl_elbc_nand.c  ...
>
> You shouldn't be setting BR_DECC if you don't want to use HW ECC, so
> this ifdef doesn't accomplish anything.
>
> Also, while a compile-time hack may be suitable for your own use, to get
> a mergable patch it should be a runtime decision.  You should be able to
> read at runtime the level of ECC that the flash requires.

How? Could you please point me to some starting point what to read in order 
to implement it?

>
>>         } else {
>>                 dev_err(priv->dev,
>>                         "fsl_elbc_init: page size %d is not supported\n",
>> @@ -774,11 +791,18 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd 
>> *priv) ...
>
> Instead change U-Boot to never set that bit in the first place.

OK, got it.

>> 2) We need to implement RNDOUT operation for SW ECC / ECC_BCH. My attempt 
>> follows:
>> 
>> @@ -335,6 +335,21 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, 
>> unsigned int command,
>>                 fsl_elbc_run_command(mtd); ...
>
> I think you should just set index = column.

OK, thanks.

Tomas