[MLC NAND]: data pattern sensivity

Andrea Scian rnd4 at dave-tech.it
Fri Apr 10 02:30:46 PDT 2015


Il 10/04/2015 10:27, Qi Wang 王起 (qiwang) ha scritto:
> Hi Andrea,
> 
> On Thu, 2015-04-09 at 22:19 +0200, Andrea Scian wrote:
>> Il 07/04/2015 19:45, Jeff Lauruhn (jlauruhn) ha scritto:
>>> I read back through the posts and I think we are talking about 2
>> separate things, random read time and randomization.
>>>
>>> Rand Read (tR) assumes you are doing a single read of a page (worst
>> case), but most data is stored in blocks sequentially, so data output can
>> be improve significantly by read by taking advantage of commands like
>> READ PAGE CACHE SEQUENTIAL which copies the next sequential page from the
>> NAND Flash array to the data register.
>>>
>>> Randomization is a relatively new feature, I'm no expert, but it's in
>> general we know there are some distributions that are worse than others,
>> and by randomizing the data we can avoid worst case and improve endurance.
> 
> Yes, Randomization can avoid worst case and improve endurance
> 
>>
>> Definitely here I'm speaking about the latter.
>> By looking inside the datasheet (hynix, micron and so on) I have I've
>> found no MLC part that explicitly required such a implementation, apart
>> the one pointed out by Boris.
> 
> For Micron MLC part, we already implement this function inside of our MLC,
> so external randomization isn't needed at all.

Thank you very much for sharing this information with the community.

It would be nice having this kind of stuff already present in datasheets
and/or a dedicated whitepaper :-)
Things like this may have a great influence in choosing the part to be
used in a given design.

Kind Regards,

-- 

Andrea SCIAN

DAVE Embedded Systems



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