[PATCH v3 0/2] Add NAND ECC devicetree binding

[Brian Norris]

On Fri, Feb 28, 2014 at 11:59:24AM -0300, Ezequiel Garcia wrote:
> On Mon, Feb 24, 2014 at 07:24:47PM -0300, Ezequiel Garcia wrote:
> > Third round, fixing a stupid semi-colon miss.
> > 
> > NAND controllers have special ECC modes, raising per-driver ECC mode devicetree
> > binding. See for instance the binding for OMAP:
> > 
> >  - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
> > 	"sw"		<deprecated> use "ham1" instead
> > 	"hw"		<deprecated> use "ham1" instead
> > 	"hw-romcode"	<deprecated> use "ham1" instead
> > 	"ham1"		1-bit Hamming ecc code
> > 	"bch4"		4-bit BCH ecc code
> > 	"bch8"		8-bit BCH ecc code
> > 
> > Other drivers (such as pxa3xx-nand) have similar requirements, with special
> > (controller-specific) ECC modes. Instead of adding a possibly different
> > binding per compatible-string, let's add generic ECC strength and ECC step size.
> > 
> > This properties aim at providing a complete description of the required ECC
> > correction to let drivers choose the appropriate ECC mode.
> > 
[...]
> 
> Brian? Any chance this lands on v3.15?

Pushed to l2-mtd.git. Thanks!

Brian