HW-ECC and erase detect [was: PATCH V2 fix mtd: gpmi: fix the bitflips for erased page]

Bill Pringlemeir bpringlemeir at nbsps.com
Fri Jan 10 15:46:20 EST 2014


[cc trimmed]

> On 10 Jan 2014, b32955 at freescale.com wrote:

>> This patch does a check for the uncorrectable failure in the following
>> steps:

On 10 Jan 2014, bpringlemeir at nbsps.com wrote:

> Another driver (which I was patterning off of) is the fsmc_nand.c and
> it's count_written_bits() routine.

> It has an interesting feature to pass the strength to the counting
> routine, so that it aborts early if more than 'strength' zeros are
> encountered.

I think 'fsmc_nand' will not detect the 'all ff data' and ECC failed
condition?  Also, it seems that UBI will write mostly xFF pages when
just an EC page/sub-page is marked, so these type of pages maybe fairly
common in practice.

It certainly would be a nice feature for a hardware ECC which writes to
the OOB data to have an 'erase detect' bit in the ECC status.  I looked
at some other MTD devices and it didn't seem they had to handle this.
Do some controller recognize an erased page and give an ECC status as
ok?

Fwiw,
Bill Pringlemeir.



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