should nand driver create ECC for a page after ERASE cmd?

[Oleksij Rempel]

Am 22.12.2014 um 19:41 schrieb Brian Norris:
> On Sun, Dec 21, 2014 at 07:44:26PM +0100, Oleksij Rempel wrote:
>> Am 21.12.2014 um 17:28 schrieb Boris Brezillon:
>>> Well, actually it depends on your NAND/ECC controller capabilities (but
>>> given your discussion with Richard on IRC, I guess you already
>>> understood that ;-))
>>>
>>> 1) Wiser controllers are generating 0xff ECC bytes for a data chunk
>>> (chunk == ECC step size) filled with 0xff. With BCH algorithms this is
>>> easily done by XORing the ECC bytes with the appropriate pattern (see
>>> soft BCH implementation)
>>> 2) Some controller just verify if the data chunk + ECC bytes are all
>>> 0xff before passing it to the ECC engine. If they are filled with 0xff
>>> the ECC correction is bypassed.
>>> This method has one drawback: it does not properly handle bitflips
>>> occurring in erased pages (if one bitflip occurs the NAND controller
>>> consider the chunk as not empty, and pass it to the BCH engine).
>>> 3) The controller does not handle erased pages at all, and in this case
>>> you'll have to manually test it (as Ezequiel suggested) when you
>>> encounter an ECC error.
>>
>> Boris,
>> i think your explanation can be placed to mtd web page, some where here :)
>> http://www.linux-mtd.infradead.org/doc/general.html#L_mtd_tests
> 
> Patches are welcome:
> 
> http://www.linux-mtd.infradead.org/faq/general.html#L_mtdwww

No problem,

should it go to "general.html#L_mtd_tests" or some other section? Boris
are you ok if i use your description for this patch?

-- 
Regards,
Oleksij

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