[PATCH RFC] Alphascale ASM9260 NAND controller driver

Oleksij Rempel linux at rempel-privat.de
Wed Dec 17 06:36:49 PST 2014


Am 17.12.2014 um 14:24 schrieb Boris Brezillon:
> Hi Oleksij,
> 
> On Wed, 17 Dec 2014 12:45:17 +0100
> Oleksij Rempel <linux at rempel-privat.de> wrote:
> 
>> I collected some questions with this driver. It will be great if you
>> can help me:
>> * Do HW_ECC driver should provideo option for SW_ECC?
> 
> This is not mandatory. I did it in the sunxi driver for testing
> purpose, but it should work fine without it.
> 
>> * My HW do ECC correction for n-bits per 512B, it mean it will
>> split block in 512B parts. If one of part has uncorrectable error, complete block will be
>> reported as failed. Are there any way for partial recovery?
> 
> I think what you're calling block here is actually a page.
> Regarding your question, there is no way to recover part of a page, but
> each ECC block should be tested and max_bitflip should be returned
> (even if some ECC blocks contains too many errors to be corrected).
> Take a look at [1] for an example.

From Flash point of view block or part which i mean != page. In my case
it is TOSHIBA TC58NVG0S3ETA00, organized as (2048 + 64) bytes × 64 pages
× 1024blocks. The NFC will split each each 2048B page to 512B
blocks/???/parts/sub_page/ecc_step/better_name.

HW_ECC provide bit_flip counter for each sub_page. If all sub_pages are
recovered, there is no problem. Beside the question, how many bit should
be counted. Right now max_bitflips = sum(all_sub_pages).

Second problem which i have is that, there is only one ecc_error flag
for all sub_pages. If one sub_page filed, i don't know which one. Ecc
erroc counter register can't help here. Only way is to reread complete
page with SW_ECC.

>> * This HW reports count of ECC bitflips for each part. Do i need to return count of errors on
>> all parts for one block?
> 
> Again: block == page, and no, you should only return the maximum
> corrected bitflips (same example [1]).
> 
> 
>> * If HW_ECC different stranges, how it should be configured? With DT or automatically
>> calculated?
> 
> I don't get that one...
> Are you talking about ECC requirements (ECC strength and steps) ?

Yes. Well, i can't choice ECC step(it is 512B on this HW), only strange.

> Best Regards,
> 
> Boris
> 
> [1]http://lxr.free-electrons.com/source/drivers/mtd/nand/nand_base.c#L1157
> 


-- 
Regards,
Oleksij

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