[PATCH 00/21] Armada 370/XP NAND support

[Daniel Mack]

On 19.09.2013 18:01, Ezequiel Garcia wrote:

> Ezequiel Garcia (21):
>   mtd: nand: pxa3xx: Allocate data buffer on detected flash size
>   mtd: nand: pxa3xx: Disable OOB on arbitrary length commands
>   mtd: nand: pxa3xx: Use a completion to signal device ready
>   mtd: nand: pxa3xx: Add bad block handling
>   mtd: nand: pxa3xx: Add driver-specific ECC BCH support
>   mtd: nand: pxa3xx: Configure detected pages-per-block
>   mtd: nand: pxa3xx: Clear cmd buffer #3 (NDCB3) on command start
>   mtd: nand: pxa3xx: Make config menu show supported platforms
>   mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO count
>   mtd: nand: pxa3xx: Replace host->page_size by mtd->writesize
>   mtd: nand: pxa3xx: Add helper function to set page address
>   mtd: nand: pxa3xx: Remove READ0 switch/case falltrough
>   mtd: nand: pxa3xx: Split prepare_command_pool() in two stages
>   mtd: nand: pxa3xx: Move the data buffer clean to
>     prepare_start_command()
>   mtd: nand: pxa3xx: Add a read/write buffers markers
>   mtd: nand: pxa3xx: Introduce multiple page I/O support
>   mtd: nand: pxa3xx: Add multiple chunk write support

Your patches work fine on my board with CONFIG_HAS_DMA=n.

However, it seems that with CONFIG_HAS_DMA=y, pxa3xx_nand_irq() is now
called before pxa3xx_nand_init_buff(), which results in a NULL pointer
dereference.  I had to tweak my pending dmaengine patch of course, but I
don't see an particular problem with that right now.

Any idea? Are you tesing with PIO mode or DMA?


Thanks,
Daniel