[PATCH 1/3] mtd: m25p80: utilize dedicated 4-byte addressing commands
marex at denx.de
Mon Mar 18 11:39:18 EDT 2013
Dear Matthieu CASTET,
> Brian Norris a écrit :
> > Traditionally, the command set used by SPI flash only supported a 3-byte
> > address. However, large SPI flash (>= 32MB, or 256Mbit) require 4 bytes
> > to address the entire flash. Most manufacturers have supplied a mode
> > switch (via a "bank register writer", or a "enable 4-byte mode"
> > command), which tells the flash to expect 4 address cycles from now on,
> > instead of 3. This mode remains until power is cut, the reset line is
> > triggered (on packages where present), or a command is sent to reset the
> > flash or to reset the 3-byte addressing mode.
> > As an alternative, some flash manufacturers have developed a new command
> > set that accept a full 4-byte address. They can be used orthogonally to
> > any of the modes; that is, they can be used when the flash is in either
> > 3-byte or 4-byte address mode.
> > Now, there are a number of reasons why the "stateful" 4-byte address
> > mode switch may not be acceptable. For instance, some SoC's perform a
> > dumb boot sequence in which they only send 3-byte read commands to the
> > flash. However, if an unexpected reset occurs, the flash chip cannot be
> > guaranteed to return to its 3-byte mode. Thus, the SoC controller and
> > flash will not understand each other.
> What's funny is the other side work :
> you can have a ROM that use 4-byte mode with 3-byte or 2-byte device as
> soon as the read command is the same. 
Well, all of these are crap design. The SPI flash shall be power-cycled if the
platform reboots no matter what exactly to prevent having it in undefined state.
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