[PATCH 1/3] mtd: m25p80: utilize dedicated 4-byte addressing commands

[Brian Norris]

On Mon, Mar 18, 2013 at 12:21 AM, Artem Bityutskiy <dedekind1 at gmail.com> wrote:
> On Sun, 2013-03-10 at 00:41 -0800, Brian Norris wrote:
>> Traditionally, the command set used by SPI flash only supported a 3-byte
>> address. However, large SPI flash (>= 32MB, or 256Mbit) require 4 bytes
>> to address the entire flash. Most manufacturers have supplied a mode
>> switch (via a "bank register writer", or a "enable 4-byte mode"
>> command), which tells the flash to expect 4 address cycles from now on,
>> instead of 3. This mode remains until power is cut, the reset line is
>> triggered (on packages where present), or a command is sent to reset the
>> flash or to reset the 3-byte addressing mode.
>
> Aiaiai!
>
> Build fails on all my general testing defconfigs.
>
> --------------------------------------------------------------------------------
> Failed to build the following commit for configuration "arm-omap2plus_defconfig" (architecture arm)":
>
> d4222c5 mtd: nand: reword nand_chip bad block interface comments
<snip>

Wow, my bad. I actually wrote and tested this against an older kernel,
then ported it. In fixing some conflicts, I misplaced my braces...

Anyway, this error (plus a logical mistake that I noticed, regarding
the placement of the "fast_read" check) tells me I should take a
closer look at this one. I'll get back with v2 eventually.

Brian