[PATCH] mtd: nand: subpage write support for hardware based ECC schemes

[Gupta, Pekon]

Hi,

> On which controller was it tested ?

[Pekon]: I tested it on TI's omap controller itself :-)
However I ran following, to confirm..
(1) mtd_subpagetest: part of MTD tests
(2) ubiattach & ubiformat of ubi image built with Volume Header at 512 offset
that is using -O 512.
(3) nand raw read / write with non-page aligned data.

Do you have any other tests in mind ?


> The problem is that lot's of controller driver with hw ecc hack the ecc interface.

> For example the TI omap driver don't use the data pointer of ecc.calculate but
> use the data send on the nand interface.

[Pekon]: Yes i agree. But what I see in TI's hack also that ECC is calculated for 
each subpage separately. Its just that instead of using data in 
chip->buffers->databuf
TI's driver uses data which is present in controller's internal buffers, which 
should be the way if we are depending on Hardware (controller) to do ECC.
Is this something different from other Hardware based ECC implementations?


[Pekon]: Also, its not just doing sub-page writes, rather its actually masking 
other sub-pages with 0xFF. And also their corresponding ECC .
This is done, because even though some NANDs support sub-page accesses,
but the actual PAGE-PROGRAM NAND command which actually flashes the 
data present in device buffers to array cells, works at page boundaries.

I'm following similar to what is given at
http://www.linux-mtd.infradead.org/doc/ubi.html#L_subpage


> Matthieu

with regards, pekon