Implementing NAND driver on a PrimeCell SMC PL350 series

[Mike Dunn]

On 01/11/2013 03:02 AM, Ricard Wanderlof wrote:
> 
> On Fri, 11 Jan 2013, Daniel Tang wrote:
> 
>> I'm trying to write a NAND driver for the PL350 memory controller.
>>
>> The problem is that the memory controller abstracts quite a lot of the
>> processes needed to access the NAND. For example, the controller handles all
>> the hardware controlling (like dealing with the CLE and ALE lines). This makes
>> it difficult to write a driver that integrates cleanly with the current NAND
>> subsystem of the kernel.
>>
>> The issue specifically is the cmd_ctrl function that my driver needs to
>> provide. When the kernel needs to write a command and address, it calls the
>> function multiple times to write all the information. E.g. set CLE, write
>> command, set ALE, then write one byte of the page address at a time. The
>> controller, on the other hand, needs all that information to be in a single
>> write to the controller. It does this by embedding the command into the
>> address and have the data value be the page address.
> 
> Have you looked among the existing NAND controller drivers in drivers/mtd/nand
> to see if there's another driver which has similar requirements which you could
> use as a starting point? It's not unusual for NAND controllers to do some of the
> operations automatically, and the mtd framework supports this by letting you
> replace higher-level functions with functions from the driver, and not just the
> low-level functions such as hwcontrol and read_byte.


You might find it helpful to take a look at docg4.c in particular.  This device
is a nand wrapped in a proprietary controller, which sounds similiar to your
hardware.  This device does not have control of low-level lines either.

Hope this helps,
Mike