Implementing NAND driver on a PrimeCell SMC PL350 series

[Daniel Tang]

Hi,

I'm trying to write a NAND driver for the PL350 memory controller. 

The problem is that the memory controller abstracts quite a lot of the processes needed to access the NAND. For example, the controller handles all the hardware controlling (like dealing with the CLE and ALE lines). This makes it difficult to write a driver that integrates cleanly with the current NAND subsystem of the kernel.

The issue specifically is the cmd_ctrl function that my driver needs to provide. When the kernel needs to write a command and address, it calls the function multiple times to write all the information. E.g. set CLE, write command, set ALE, then write one byte of the page address at a time. The controller, on the other hand, needs all that information to be in a single write to the controller. It does this by embedding the command into the address and have the data value be the page address.

There is a flow chart on page 51 of the reference manual if this seems unclear (http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/DDI0380G_smc_pl350_series_r2p1_trm.pdf).

Can anyone advise what would be the best way to implement the driver?

Thanks,
Daniel