[PATCH v2] mtd: nand: support BENAND (Built-in ECC NAND)

[Gupta, Pekon]

> -----Original Message-----
> From: Matthieu CASTET [mailto:matthieu.castet at parrot.com]
> Sent: Monday, February 25, 2013 2:54 PM
> To: Gupta, Pekon
> Cc: katsuki.uwatoko at toshiba.co.jp; linux-mtd at lists.infradead.org
> Subject: Re: [PATCH v2] mtd: nand: support BENAND (Built-in ECC NAND)
> 
> Gupta, Pekon a écrit :
> > Hi,
> >
> >> This enables support for BENAND, which is an SLC NAND flash solution
> >> with embedded error correction code (ECC), currently supports only
> >> 128bytes OOB type.
> >>
> >> In the read sequence, "status read command" is executed to check the
> >> ECC status after read data. If bitflips occur, these are
> >> automatically corrected by BENAND and the status indicates the result.
> >>
> >> The write sequence is the same as raw write and the ECC data are
> >> automatically written to OOB by BENAND.
> >
> > Just inquisitive, can anyone please share any throughput comparison
> between 'BENAND' & 'normal NAND' devices having same capacity and
> working on same clock-freq ?
> >
> > (a) Usually on-chip memory controllers work on faster clock frequencies, as
> compared to the NAND devices connected to them externally on board.
> > Thus I assume, ECC computation & correction can be done at faster rate.
> >
> > (b) However, on other hand BENAND(s) have luxury of accessing the Flash
> storage array locally, thus eliminating I/O delays | un-optimized IO signal
> timing from the access-path.
> >
> > So, if you can share the details throughput comparison between the two
> types of NAND devices, under various conditions it would be helpful.
> >
> You always have to transfer the data from/to the nand devices to/from the
> host.
> 
> - Either the ecc internal controller is fast and the throughput are the same
> than 'normal nand' (assuming the ecc controller on the host is fast),
> - either it is slow and the throughput is limited by the internal ecc controller
> (throughput is slower than 'normal nand')
> 
I agree about the data portion.. 
But assuming there is no file-system OOB metadata | cleanmarker to be stored (like in UBIFS)
Do we still need to transfer OOB data from Host processor to NAND device ?
If yes, then ECC calculation & correction which at times is main bottle-neck in NAND accesses, 
may be best done at Host-processor side.. 

Also, In-case there is some file-system metadata to be stored in OOB|spare area along with ECC,
how do we ensure that layout of metadata does not overlap with ECC syndrome in BENAND ?
Is the BENAND capable of re-adjusting its ECC layout ? 


with regards, pekon

> 
> Matthieu