[PATCH] mtd: m25p80: Micron SPI uses Macronix-style 4-byte addressing

[Brian Norris]

On Fri, Aug 9, 2013 at 11:46 AM, Marek Vasut <marex at denx.de> wrote:
> Dear Brian Norris,
>
>> For SPI NOR flash that are larger than 128Mbit (16MiB), we need 4 bytes
>> of address space to reach the entire flash; however, the original SPI
>> flash protocol used only 3 bytes for the address. So far, the practice
>> for handling this has been either to use new command opcodes that are
>> defined to use 4 bytes for their address, or to use special
>> mode-switching command to configure all traditionally-3-byte-address
>> commands to take 4 bytes instead.

[snip long description of a mess]

> The situation with the 4b addressing is a horrible mess :(

Agreed. It took me a while to figure out that this was the root of my
problems last week.

> Acked-by: Marek Vasut <marex at denx.de>

Thanks.

Brian